
key-num-led:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400680 <_init>:
  400680:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400684:	910003fd 	mov	x29, sp
  400688:	94000050 	bl	4007c8 <call_weak_fn>
  40068c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400690:	d65f03c0 	ret

Disassembly of section .plt:

00000000004006a0 <.plt>:
  4006a0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4006a4:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf55c>
  4006a8:	f947fe11 	ldr	x17, [x16, #4088]
  4006ac:	913fe210 	add	x16, x16, #0xff8
  4006b0:	d61f0220 	br	x17
  4006b4:	d503201f 	nop
  4006b8:	d503201f 	nop
  4006bc:	d503201f 	nop

00000000004006c0 <exit@plt>:
  4006c0:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  4006c4:	f9400211 	ldr	x17, [x16]
  4006c8:	91000210 	add	x16, x16, #0x0
  4006cc:	d61f0220 	br	x17

00000000004006d0 <perror@plt>:
  4006d0:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  4006d4:	f9400611 	ldr	x17, [x16, #8]
  4006d8:	91002210 	add	x16, x16, #0x8
  4006dc:	d61f0220 	br	x17

00000000004006e0 <signal@plt>:
  4006e0:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  4006e4:	f9400a11 	ldr	x17, [x16, #16]
  4006e8:	91004210 	add	x16, x16, #0x10
  4006ec:	d61f0220 	br	x17

00000000004006f0 <open@plt>:
  4006f0:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  4006f4:	f9400e11 	ldr	x17, [x16, #24]
  4006f8:	91006210 	add	x16, x16, #0x18
  4006fc:	d61f0220 	br	x17

0000000000400700 <__libc_start_main@plt>:
  400700:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400704:	f9401211 	ldr	x17, [x16, #32]
  400708:	91008210 	add	x16, x16, #0x20
  40070c:	d61f0220 	br	x17

0000000000400710 <sleep@plt>:
  400710:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400714:	f9401611 	ldr	x17, [x16, #40]
  400718:	9100a210 	add	x16, x16, #0x28
  40071c:	d61f0220 	br	x17

0000000000400720 <close@plt>:
  400720:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400724:	f9401a11 	ldr	x17, [x16, #48]
  400728:	9100c210 	add	x16, x16, #0x30
  40072c:	d61f0220 	br	x17

0000000000400730 <__gmon_start__@plt>:
  400730:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400734:	f9401e11 	ldr	x17, [x16, #56]
  400738:	9100e210 	add	x16, x16, #0x38
  40073c:	d61f0220 	br	x17

0000000000400740 <abort@plt>:
  400740:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400744:	f9402211 	ldr	x17, [x16, #64]
  400748:	91010210 	add	x16, x16, #0x40
  40074c:	d61f0220 	br	x17

0000000000400750 <puts@plt>:
  400750:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400754:	f9402611 	ldr	x17, [x16, #72]
  400758:	91012210 	add	x16, x16, #0x48
  40075c:	d61f0220 	br	x17

0000000000400760 <setitimer@plt>:
  400760:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400764:	f9402a11 	ldr	x17, [x16, #80]
  400768:	91014210 	add	x16, x16, #0x50
  40076c:	d61f0220 	br	x17

0000000000400770 <ioctl@plt>:
  400770:	b0000090 	adrp	x16, 411000 <exit@GLIBC_2.17>
  400774:	f9402e11 	ldr	x17, [x16, #88]
  400778:	91016210 	add	x16, x16, #0x58
  40077c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400780 <_start>:
  400780:	d280001d 	mov	x29, #0x0                   	// #0
  400784:	d280001e 	mov	x30, #0x0                   	// #0
  400788:	aa0003e5 	mov	x5, x0
  40078c:	f94003e1 	ldr	x1, [sp]
  400790:	910023e2 	add	x2, sp, #0x8
  400794:	910003e6 	mov	x6, sp
  400798:	580000c0 	ldr	x0, 4007b0 <_start+0x30>
  40079c:	580000e3 	ldr	x3, 4007b8 <_start+0x38>
  4007a0:	58000104 	ldr	x4, 4007c0 <_start+0x40>
  4007a4:	97ffffd7 	bl	400700 <__libc_start_main@plt>
  4007a8:	97ffffe6 	bl	400740 <abort@plt>
  4007ac:	00000000 	.inst	0x00000000 ; undefined
  4007b0:	00400938 	.word	0x00400938
  4007b4:	00000000 	.word	0x00000000
  4007b8:	004009a8 	.word	0x004009a8
  4007bc:	00000000 	.word	0x00000000
  4007c0:	00400a28 	.word	0x00400a28
  4007c4:	00000000 	.word	0x00000000

00000000004007c8 <call_weak_fn>:
  4007c8:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf55c>
  4007cc:	f947f000 	ldr	x0, [x0, #4064]
  4007d0:	b4000040 	cbz	x0, 4007d8 <call_weak_fn+0x10>
  4007d4:	17ffffd7 	b	400730 <__gmon_start__@plt>
  4007d8:	d65f03c0 	ret
  4007dc:	00000000 	.inst	0x00000000 ; undefined

00000000004007e0 <deregister_tm_clones>:
  4007e0:	b0000080 	adrp	x0, 411000 <exit@GLIBC_2.17>
  4007e4:	9101c000 	add	x0, x0, #0x70
  4007e8:	b0000081 	adrp	x1, 411000 <exit@GLIBC_2.17>
  4007ec:	9101c021 	add	x1, x1, #0x70
  4007f0:	eb00003f 	cmp	x1, x0
  4007f4:	540000a0 	b.eq	400808 <deregister_tm_clones+0x28>  // b.none
  4007f8:	90000001 	adrp	x1, 400000 <_init-0x680>
  4007fc:	f9452421 	ldr	x1, [x1, #2632]
  400800:	b4000041 	cbz	x1, 400808 <deregister_tm_clones+0x28>
  400804:	d61f0020 	br	x1
  400808:	d65f03c0 	ret
  40080c:	d503201f 	nop

0000000000400810 <register_tm_clones>:
  400810:	b0000080 	adrp	x0, 411000 <exit@GLIBC_2.17>
  400814:	9101c000 	add	x0, x0, #0x70
  400818:	b0000081 	adrp	x1, 411000 <exit@GLIBC_2.17>
  40081c:	9101c021 	add	x1, x1, #0x70
  400820:	cb000021 	sub	x1, x1, x0
  400824:	9343fc21 	asr	x1, x1, #3
  400828:	8b41fc21 	add	x1, x1, x1, lsr #63
  40082c:	9341fc21 	asr	x1, x1, #1
  400830:	b40000a1 	cbz	x1, 400844 <register_tm_clones+0x34>
  400834:	90000002 	adrp	x2, 400000 <_init-0x680>
  400838:	f9452842 	ldr	x2, [x2, #2640]
  40083c:	b4000042 	cbz	x2, 400844 <register_tm_clones+0x34>
  400840:	d61f0040 	br	x2
  400844:	d65f03c0 	ret

0000000000400848 <__do_global_dtors_aux>:
  400848:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40084c:	910003fd 	mov	x29, sp
  400850:	f9000bf3 	str	x19, [sp, #16]
  400854:	b0000093 	adrp	x19, 411000 <exit@GLIBC_2.17>
  400858:	3941c260 	ldrb	w0, [x19, #112]
  40085c:	35000080 	cbnz	w0, 40086c <__do_global_dtors_aux+0x24>
  400860:	97ffffe0 	bl	4007e0 <deregister_tm_clones>
  400864:	52800020 	mov	w0, #0x1                   	// #1
  400868:	3901c260 	strb	w0, [x19, #112]
  40086c:	f9400bf3 	ldr	x19, [sp, #16]
  400870:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400874:	d65f03c0 	ret

0000000000400878 <frame_dummy>:
  400878:	17ffffe6 	b	400810 <register_tm_clones>

000000000040087c <slam_alarm_handler>:
  40087c:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400880:	910003fd 	mov	x29, sp
  400884:	b9001fa0 	str	w0, [x29, #28]
  400888:	b9002fbf 	str	wzr, [x29, #44]
  40088c:	b9002bbf 	str	wzr, [x29, #40]
  400890:	90000000 	adrp	x0, 400000 <_init-0x680>
  400894:	91296000 	add	x0, x0, #0xa58
  400898:	52800001 	mov	w1, #0x0                   	// #0
  40089c:	97ffff95 	bl	4006f0 <open@plt>
  4008a0:	b9002ba0 	str	w0, [x29, #40]
  4008a4:	b9402ba0 	ldr	w0, [x29, #40]
  4008a8:	7100081f 	cmp	w0, #0x2
  4008ac:	540000cc 	b.gt	4008c4 <slam_alarm_handler+0x48>
  4008b0:	90000000 	adrp	x0, 400000 <_init-0x680>
  4008b4:	9129a000 	add	x0, x0, #0xa68
  4008b8:	97ffff86 	bl	4006d0 <perror@plt>
  4008bc:	52800000 	mov	w0, #0x0                   	// #0
  4008c0:	97ffff80 	bl	4006c0 <exit@plt>
  4008c4:	528000e0 	mov	w0, #0x7                   	// #7
  4008c8:	b9002fa0 	str	w0, [x29, #44]
  4008cc:	b9402fa2 	ldr	w2, [x29, #44]
  4008d0:	d2896641 	mov	x1, #0x4b32                	// #19250
  4008d4:	b9402ba0 	ldr	w0, [x29, #40]
  4008d8:	97ffffa6 	bl	400770 <ioctl@plt>
  4008dc:	7100001f 	cmp	w0, #0x0
  4008e0:	5400008d 	b.le	4008f0 <slam_alarm_handler+0x74>
  4008e4:	90000000 	adrp	x0, 400000 <_init-0x680>
  4008e8:	9129c000 	add	x0, x0, #0xa70
  4008ec:	97ffff79 	bl	4006d0 <perror@plt>
  4008f0:	52800020 	mov	w0, #0x1                   	// #1
  4008f4:	97ffff87 	bl	400710 <sleep@plt>
  4008f8:	52801fe0 	mov	w0, #0xff                  	// #255
  4008fc:	b9002fa0 	str	w0, [x29, #44]
  400900:	b9402fa2 	ldr	w2, [x29, #44]
  400904:	d2896641 	mov	x1, #0x4b32                	// #19250
  400908:	b9402ba0 	ldr	w0, [x29, #40]
  40090c:	97ffff99 	bl	400770 <ioctl@plt>
  400910:	7100001f 	cmp	w0, #0x0
  400914:	5400008d 	b.le	400924 <slam_alarm_handler+0xa8>
  400918:	90000000 	adrp	x0, 400000 <_init-0x680>
  40091c:	912a0000 	add	x0, x0, #0xa80
  400920:	97ffff6c 	bl	4006d0 <perror@plt>
  400924:	b9402ba0 	ldr	w0, [x29, #40]
  400928:	97ffff7e 	bl	400720 <close@plt>
  40092c:	d503201f 	nop
  400930:	a8c37bfd 	ldp	x29, x30, [sp], #48
  400934:	d65f03c0 	ret

0000000000400938 <main>:
  400938:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  40093c:	910003fd 	mov	x29, sp
  400940:	f9000fbf 	str	xzr, [x29, #24]
  400944:	d2800040 	mov	x0, #0x2                   	// #2
  400948:	f9000ba0 	str	x0, [x29, #16]
  40094c:	f90017bf 	str	xzr, [x29, #40]
  400950:	d2800040 	mov	x0, #0x2                   	// #2
  400954:	f90013a0 	str	x0, [x29, #32]
  400958:	910043a0 	add	x0, x29, #0x10
  40095c:	d2800002 	mov	x2, #0x0                   	// #0
  400960:	aa0003e1 	mov	x1, x0
  400964:	52800000 	mov	w0, #0x0                   	// #0
  400968:	97ffff7e 	bl	400760 <setitimer@plt>
  40096c:	7100001f 	cmp	w0, #0x0
  400970:	540000ca 	b.ge	400988 <main+0x50>  // b.tcont
  400974:	90000000 	adrp	x0, 400000 <_init-0x680>
  400978:	912a4000 	add	x0, x0, #0xa90
  40097c:	97ffff75 	bl	400750 <puts@plt>
  400980:	12800000 	mov	w0, #0xffffffff            	// #-1
  400984:	97ffff4f 	bl	4006c0 <exit@plt>
  400988:	90000000 	adrp	x0, 400000 <_init-0x680>
  40098c:	9121f000 	add	x0, x0, #0x87c
  400990:	aa0003e1 	mov	x1, x0
  400994:	528001c0 	mov	w0, #0xe                   	// #14
  400998:	97ffff52 	bl	4006e0 <signal@plt>
  40099c:	52800040 	mov	w0, #0x2                   	// #2
  4009a0:	97ffff5c 	bl	400710 <sleep@plt>
  4009a4:	17fffffe 	b	40099c <main+0x64>

00000000004009a8 <__libc_csu_init>:
  4009a8:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  4009ac:	910003fd 	mov	x29, sp
  4009b0:	a901d7f4 	stp	x20, x21, [sp, #24]
  4009b4:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf55c>
  4009b8:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf55c>
  4009bc:	91374294 	add	x20, x20, #0xdd0
  4009c0:	913722b5 	add	x21, x21, #0xdc8
  4009c4:	a902dff6 	stp	x22, x23, [sp, #40]
  4009c8:	cb150294 	sub	x20, x20, x21
  4009cc:	f9001ff8 	str	x24, [sp, #56]
  4009d0:	2a0003f6 	mov	w22, w0
  4009d4:	aa0103f7 	mov	x23, x1
  4009d8:	9343fe94 	asr	x20, x20, #3
  4009dc:	aa0203f8 	mov	x24, x2
  4009e0:	97ffff28 	bl	400680 <_init>
  4009e4:	b4000194 	cbz	x20, 400a14 <__libc_csu_init+0x6c>
  4009e8:	f9000bb3 	str	x19, [x29, #16]
  4009ec:	d2800013 	mov	x19, #0x0                   	// #0
  4009f0:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  4009f4:	aa1803e2 	mov	x2, x24
  4009f8:	aa1703e1 	mov	x1, x23
  4009fc:	2a1603e0 	mov	w0, w22
  400a00:	91000673 	add	x19, x19, #0x1
  400a04:	d63f0060 	blr	x3
  400a08:	eb13029f 	cmp	x20, x19
  400a0c:	54ffff21 	b.ne	4009f0 <__libc_csu_init+0x48>  // b.any
  400a10:	f9400bb3 	ldr	x19, [x29, #16]
  400a14:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400a18:	a942dff6 	ldp	x22, x23, [sp, #40]
  400a1c:	f9401ff8 	ldr	x24, [sp, #56]
  400a20:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400a24:	d65f03c0 	ret

0000000000400a28 <__libc_csu_fini>:
  400a28:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400a2c <_fini>:
  400a2c:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400a30:	910003fd 	mov	x29, sp
  400a34:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400a38:	d65f03c0 	ret
